The present invention relates generally to integrated circuits, and more particularly to cross switches.
Cross switches are often used to route data from a variety of inputs to a variety of outputs. With ever-increasing data communication needs, the number of inputs and outputs to cross switches has often been subject to increase. Moreover, as nodes are often in communication with a number of other nodes, the connections between outputs and inputs often require reconfiguration during operation of the switch.
Increasing the numbers of inputs and outputs to a switch generally results in increased die area, power usage, heat generation, and complexity of the switch. For example, a switch may receive input signals, generate internal signals corresponding to the input signals using active elements within the switch, control connections between input lines and output lines using active elements, and drive output signals using additional active elements. As the number of inputs and outputs grow, so do the size, power and other requirements of the switch. In many cases these constraints limit the number of inputs and outputs available on a particular integrated circuit forming a switch.
One method for providing increased number of inputs and outputs is to combine several switch devices into a single switch. The switch devices may be combined, for example, as a three stage Clos network, a Benes network, or a square crossbar switch. Generally, a three stage Clos network and a Benes network are more efficient in terms of minimizing the number of switch devices (N3/2 and NlogN respectively) but may be more complex in programming or scalability. For a square crossbar switch the number of devices increases by N2, but greater simplicity in terms of each switch device may potentially be obtained. The use of a number of switch devices, however, is also problematic as the number of devices increases, with accompanying power and heat issues.
Larger switch size also sometimes increases the possibility of improper design or improper manufacturer of the chip. Testing of larger switches, however, can at times be difficult, both with respect to internal switch operation as well as connections to the switch. Absent adequate testing capability of the switch itself, determination of whether a particular chip is bad or whether connections to the chip are flawed may be difficult.
Further, larger switches require increased programming when determining the output input connections. Indeed, in an extreme case operation of the switch may be delayed while continued programming of the switch occurs.
In addition, particularly at higher frequencies, data degradation may occur due to inter-symbol interference. Inter-symbol interference (ISI) can result when the bandwidth of a transmission media or an amplifying circuit is not sufficient to pass the frequency content of a data signal without attenuating or phase-shifting some of the constituent frequencies such that a data pulse will not reach its full amplitude. When the data pulse passes a given threshold level, a pattern-dependant jitter occurs. The pattern-dependant jitter is often due to the narrowing or widening of the data pulses that depends on the data pulses' voltage history. A signal that has been distorted in this way is difficult to recover error-free.
Typically, to prevent ISI, an amplifier is designed to have a flat gain versus frequency response past 0.7 times the bit data rate. However, this is often not feasible where numerous amplifiers in a chain are required to accomplish a signal processing function. For instance, the flat bandwidth of the circuit goes down as amplifiers are added. Power dissipation constraints or capacitive loading conditions also limit the feasibility designing an amplifier to prevent ISI. For example, reduced drive or increased loading lead to a reduction in gain at lower frequencies.
Conventionally, flattening the frequency response of amplifiers is performed through negative feedback which reduces the gain and extends the bandwidth. The use of variable-gain amplifiers is another possibility for trading bandwidth for gain.
One conventional approach for mitigating ISI in linear transmission media (not in amplifiers) is static or adaptive equalization, in static or adaptive equalization a circuit which inverts the characteristics of the medium is placed at the receiver (after the transmission medium) to produce a facsimile of the original signal.
However, it is not always possible to have adequate bandwidth in a chain of amplifiers and meet other design constraints simultaneously. Amplifiers with high bandwidth tend to dissipate more power and require more expensive IC processes.
If there is excess gain in the amplifier chain, negative feedback could be used to reduce gain and increase bandwidth, but this is not feasible if the output is not in proximity to the input. At high frequencies of operation, “in proximity” is in practice a very short distance, often far less than the input and output pins of an IC. Longer distances for the feedback path can result in delays that de-stabilize the feedback loop and cause it to oscillate. The feedback approach also assumes linear amplification. If limiting is required, reducing the gain via negative feedback will reduce or remove the limiting effect.
This situation often occurs in un-retimed (asynchronous) cross-point switch circuits. For such circuits, where the relationship between input and output ports is selectable, a feedback path is only established by doubling the required connections. Hence, a significant delay would result to cause the circuit to oscillate undesirably.
Furthermore, an equalization approach generally cannot be applied at the output of a chain of limiting amplifiers, because some of the original characteristics of the signal have been removed by the limiting operation.